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1 × LKR1.50
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2 × LKR900.00
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1 × LKR10.00
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CD1H105KC9IER1E000-?10% 50V 1uF X7R Plugin,P=5.08mm Multilayer Ceramic Capacitors MLCC - Leaded ROHS1 × LKR12.00
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1 × LKR3.00
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1 × LKR3.00
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40 Pin ZIF Socket (Zero Insertion Force)
This ZIF (Zero Insertion Force) IC Socket is ideal for prototyping and testing where you need to swap your chips very frequently. When the lever is pressed down, the spring loaded contacts latch onto the inserted chip’s pins; when the lever is pulled up, the chip is released.
Holds chips with up to 40 pins. Breadboard & Protoboard and Perfboard compatible.
Specifications:
- IC Socket Size: 40 Pin
- Socket Type: ZIF (Zero Insertion Force)
- Pin Spacing: Standard 2.54mm
- Wide Entry Area for easy IC insertion
- Spring Loaded Contacts with Lever mechanism
- Color: Blue
- Width: 0.6″
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2N3904G-TO92
- Transistor Polarity: NPNÂ
- Collector- Emitter Voltage VCEO Max: 40 VÂ
- Emitter- Base Voltage VEBO: 6 VÂ
- Maximum DC Collector Current: 0.2 AÂ
- DC Collector/Base Gain hfe Min: 40 at 0.1 mA at 1 VÂ
- Configuration: SingleÂ
- Maximum Operating Frequency: 300 MHz (Min)Â
- Maximum Operating Temperature: + 150 CÂ
- Mounting Style: Through HoleÂ
- Package / Case: TO-92Â
- Packaging: BulkÂ
- Continuous Collector Current: 0.2 AÂ
- Minimum Operating Temperature: – 55 CÂ
- Power Dissipation: 625 mW
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Atmega32A-PU-PDIP
SummaryThe low power, high performance Microchip 8-bit AVR RISC-based microcontroller featuring 32KB self-programming flash program memory, 2KB SRAM, 1KB EEPROM, 8 channel 10-bit A/D converter and JTAG interface for on-chip-debug. The device acheives 16 MIPS throughput at 16 MHz at 2.7-5.5V operation.
By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz, allowing you to optimize power consumption versus processing speed.
Additional Features-
- Advanced RISC Architecture
- 131 Powerful Instructions – Most Single-clock Cycle Execution
- 32 × 8 General Purpose Working Registers
- Fully Static Operation
- Up to 16MIPS Throughput at 16MHz
- On-chip 2-cycle Multiplier
- High Endurance Non-volatile Memory segments
- 32Kbytes of In-System Self-programmable Flash program memory
- 1024Bytes EEPROM
- 2Kbytes Internal SRAM
- Write/Erase cycles: 10,000 Flash/100,000 EEPROM
- Data retention: 20 years at 85°C/100 years at 25°C
- Optional Boot Code Section with Independent Lock Bits
- In-System Programming by On-chip Boot Program
- True Read-While-Write Operation
- Programming Lock for Software Security
- JTAG (IEEE std. 1149.1 Compliant) Interface
- Boundary-scan Capabilities According to the JTAG Standard
- Extensive On-chip Debug SupportProgramming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
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- QTouch library support
- Capacitive touch buttons, sliders and wheels
- QTouch and QMatrix acquisition
- Up to 64 sense channels
- Advanced RISC Architecture
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